Prior art multiplexer stages have separate transistor levels for the select transistor and the data transistor. One stage is provided for each bit. In conventional multiplexer stage design, the select transistor has a current path that connects an output node to a common node, and a voltage threshold transistor that connects a voltage supply to this common node. The select transistor and the voltage threshold transistor are thus connected as a differential pair. A data transistor of the stage selectively connects the common node to a current source. One example of such a conventional design is the multiplexer described in U.S. Pat. No. 4,686,674 issued to N.C. Lam.
At least two disadvantages have become apparent in the use of this prior art type of structure. First, four transistors are necessary for each multiplexer stage or bit: a select transistor, a voltage threshold transistor, a data transistor and a current source transistor. Area has to be accorded in the layout for each of these transistors, together with conductors for the signals that control them.
Another disadvantage relates to the operation of a conventional multiplexer stage. Since the select transistor and the voltage threshold transistor are connected as a differential pair, a signal on the select line that is substantially higher than the signal on the voltage threshold line will select the stage. The output will then "see" the state of the common node of the selected state, which will be charged or not depending on whether the data transistor has been rendered conductive. If a select signal is applied to the select transistor before a high data signal is applied to the data transistor, the common node may be charged for a short time before it is discharged once the high data signal is applied. The output node will thus be high for a short time before it is discharged to a low condition, thereby causing a glitch in the data output of the multiplexer. A need has therefore arisen for a multiplexer that uses less transistors per stage while avoiding the above-noted possibility of a data glitch.